The semiconductor integrated circuit (IC) industry has experienced rapid growth in recent years. Technological advances in IC materials and design have produced generations of ICs where each generation has smaller and more complex circuits than the previous generation. However, these advances have increased the complexity of processing and manufacturing ICs and, for these advances to be realized, similar developments in IC processing and manufacturing are needed. In the course of integrated circuit evolution, functional density (i.e., the number of interconnected devices per chip area) has generally increased while geometry size (i.e., the smallest component (or line) that can be created using a fabrication process) has steadily decreased.
To achieve the needed functional density and geometry size, modern semiconductor fabrication may involve a plurality of fabrication processes. For example, a nitride etching fabrication process may need to be performed to remove a nitride material from a semiconductor wafer. However, traditional nitride etching techniques tend to damage the wafer surface, particularly if the nitride etching needs to occur after gate pattern formation, since the removal of the nitride material cannot be done using physical force at that point. In addition, the traditional nitride etching techniques may have poor etching uniformity and may not have a proper balance between etching selectivity and wafer surface defect reduction.
Therefore, while existing nitride removal methods have been generally adequate for their intended purposes, they have not been entirely satisfactory in every aspect.